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| ELECTRONICS INC. 10/100 LAN Interface Module with Common Mode Termination EPF8001GM THIS PART IS PRODUCED UNDER LICENSE FROM NATIONAL SEMICONDUCTOR CORP. * Optimized for DP83840A/DP83223 Chip Set * * Recommended for use with ICS 1890 Series and SS578Q2120 * when connected per appropriate schematic * Guaranteed to operate with 8 mA DC bias at 70C * * Complies with or exceeds IEEE 802.3, 10 BT/100 BX Standards * Electrical Parameters @ 25 C OCL @ 70C 100 KHz, 0.1 Vrms 8 mA DC Bias Cable Side 350H Insertion Loss (dB Max.) 1-80 MHz 80-100 MHz 100-150 MHz 1-30 MHz Return Loss (dB Min.) 30-60 MHz 60-100 MHz Common Mode Rejection (dB Min.) 1-30 MHz 100 MHz 200 MHz Crosstalk (dB Min.) [Between Channels] 5-10 MHz 10-100 MHz Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit -1 -1 -2 * -2 -3.5 -3 -18 -18 -12 Rcv Xmit -12 -10 Rcv Xmit Rcv Xmit Rcv Xmit Rcv -10 -38 -38 -35 -30 * -25 -25 -35 -35 Isolation : 1500 Vrms * Impedance : 100 * Rise Time : 3.0 nS Max. Schematic Receive Channel RD+ 1 7 RX+ 5 CT RD- 2 1:1 CT 3 6 RXTD- 15 CMT CT 14 TD+ 16 1:1 12 CT 10 TX+ 12 CT Transmit Channel 11 TX- Package A J Pin 1 I.D. PCA EPF8001GM Date Code Dim. Dimensions (Inches) Min. Max. Nom. .880 .365 .355 .700 .003 .100 .490 .016 .008 .085 0 .025 .900 .385 .375 Typ. .020 Typ. .510 .022 .012 Typ. 8 .045 .030 .100 .055 .540 (Millimeters) Min. Max. Nom. 22.35 9.27 9.02 17.78 .076 2.54 12.45 .406 .203 2.16 0 .635 22.86 9.78 9.52 Typ. .508 Typ. 12.95 .559 .305 Typ. 8 1.14 .762 2.54 1.40 13.72 N Pad Layout B Q P D C E M K L I A B C D E F G H I J K L M N P Q H F G PCA ELECTRONICS, INC. 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 CSF8001GMa Rev. - 1/23/97 TEL: (818) 892-0761 FAX: (818) 894-5791 http://www.pcainc.com ELECTRONICS INC. 10/100 LAN Interface Module with Common Mode Termination THIS PART IS PRODUCED UNDER LICENSE FROM NATIONAL SEMICONDUCTOR CORP. The circuit below is a guideline for interconnecting PCA's EPF8001GM with National DP83840A and DP83223(A) twister chip set for 10/100 Mb/s applications. Further details can be obtained from the chip manufacturer application notes. Please consult PCA for applications help regarding the SSI78Q2120 or ICS1890 series parts or consult with the respective application notes. Typical insertion loss of the isolation transformer is 0.5dB. This parameter covers the entire spectrum of the encoded signals in 10/100 protocols. Under terminated conditions, to transmit a 2V pk-pk signal across the cable, you must adjust the TXREF resistor of the twister chip to get at least 2.12V pk-pk across pins 16-15. Note that this part only has one series common mode choke and a shunt choke with its center tap available at pin 12 for the "common mode termination" via an external 75. This shunting effect may not meet the system EMI containment needs; in such a case, system designers are highly encouraged to investigate the use of EPF8017GM, a part built specifically with better common mode attenuation for applications with DP83840A and DP83223(A). Designers of the TSC or the ICS parts may look into EPF8010GM for similar enhanced common mode attenuation. System designers need not take the receiver side center tap to ground, via a capacitor. This may worsen EMI, specifically if the secondary "common mode termination" is pulled to chassis ground as shown. The phantom resistors shown around the connector have been known to suppress unwanted radiation that unused wires pick up from the immediate environment. Their placement and use are to be considered carefully before a design is finalized. The "common mode termination" load of 75 shown from the center taps of the secondary may be taken to chassis ground via a cap of suitable value. This depends upon user's design, EMI margin etc. It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit the plane off at least 0.05 inches away from the chip side pins of EPF8001GM. There need not be any ground plane beyond this point. For best results, PCB designer should design the outgoing traces preferably to be 50 , balanced and well coupled to achieve minimum radiation from these traces. Typical Application Circuit for UTP (Excerpts from NSC DP83840A application notes) 0.10F {Note 1} + 1 5 12 75 75 50 8 7 5 4 RXD 1000pF 12.1 12.1 1000pF + 0.1F {Note 1} 2 50 + 16 14 15 TXO 6 7 11 10 RXI TXU 6 3 2 1 2000V RJ45* TD - PMRD EPF8001GM Isolation Cap DP83840A DP83223 SD PMID Chassis Ground Other pull down/up resistors not shown, for clarification please refer to National's application notes. Notes : 1. See text above for clarification. 2. *NIC Side is shown. Hub side connections will have crossover swapping pins 3-6 & 1-2. + SD + RD - PCA ELECTRONICS, INC. 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 CSF8001GMb Rev. - 1/23/97 TEL: (818) 892-0761 FAX: (818) 894-5791 http://www.pcainc.com |
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